Electronic Design

Pioneering FPGA-on-Modules: SGET Works to Develop Standard

The SGET embedded standardization body is hammering out a standard for FPGA-on-modules. Discover the benefits and how the new Harmonized FPGA Module (HFM) standard will impact the industry. Why ...
Hackaday

65F02 Is An FPGA 6502 With A Need For Speed

Does the in 65F02 “F” stand for “fast” or “FPGA”? [Jurgen] doesn’t know, but his drop-in replacement board for the 6502 and ...
Electronic Design

MathWorks speeds up FPGA-in-the-loop verification

Natick, MA. MathWorks today announced new capabilities in HDL Verifier to speed up FPGA-in-the-loop (FIL) verification. The new FIL capabilities enable faster communication with the FPGA board and ...
Business Wire

MathWorks Speeds FPGA and ASIC Verification with Universal Verification Methodology (UVM) Support

NATICK, Mass.--(BUSINESS WIRE)--MathWorks today announced that HDL Verifier provides support for the Universal Verification Methodology (UVM) starting with Release 2019b, which is currently available.
NBC4 Columbus

Arasan announces MIPI CSI IP for FPGA supporting full C-PHY 2.0 speeds

Arasan announces the immediate availability of its MIPI CSI IP supporting C-PHY v2.0 speeds of up to 54.72Gbps (when operating up to 8 Gsps with all 3 channels) for FPGA designs SAN JOSE, Calif., Nov.
Tech Xplore on MSN

New chip design cuts AI energy use by enabling smarter FPGA processing

A new innovation from Cornell researchers lowers the energy use needed to power artificial intelligence—a step toward shrinking the carbon footprints of data centers and AI infrastructure.