The core concepts in hardware-software co-design are getting another look, nearly two decades after this approach was first introduced and failed to catch on. What’s different this time around is the ...

This paper presents a new hardware/software partitioning methodology for SoCs. Target architecture is composed of a RISC host and one or more configurable microprocessors. First, a system is ...

Of course I will be in trouble once this blog is posted. This post is about hardware/software debug, and I tried to layer a set of different levels for the scope and applicability of debug. I counted ...